GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 1 of 8 normally C off silicon carbide junction transistor features package ? 175 c maximum operating temperature ? gate oxide free sic switch ? exceptional safe operating area ? excellent gain linearity ? temperature independent switching performance ? low output capacitance ? positive temperature coefficient of r ds,on ? suitable for connecting an anti-parallel diode 7l d2pak (to-263-7l) advantages applications ? compatible with si mosfet/igbt gate drive ics ? > 20 s short-circuit withstand capability ? lowest-in-class conduction losses ? high circuit efficiency ? minimal input signal distortion ? high amplifier bandwidth ? down hole oil drilling, geothermal instrumentation ? hybrid electric vehicles (hev) ? solar inverters ? switched-mode power supply (smps) ? power factor correction (pfc) ? induction heating ? uninterruptible power supply (ups) ? motor drives table of contents section i: absolute maximum ratings ........................... ............................................................................... 1 section ii: static electri cal characteristics ................. .................................................................................. 2 section iii: f igures .......................................... ................................................................................................. 3 section iv: driving th e GR1500JT17-263 ........................ .............................................................................. 5 section v: package dimensions ................................. ................................................................................... 8 section vi: spice model parameters ............................ ................................................................................ 9 section i: absolute maximum ratings parameter symbol conditions value unit notes drain C source voltage v ds v gs = 0 v 1700 v continuous drain current i d t c = 25c 2 a continuous gate current i g 0.1 a turn-off safe operating area rbsoa t vj = 175 c, clamped inductive load i d,max = 2 @ v ds v dsmax a fig. 9 short circuit safe operating area scsoa t vj = 175c, i g = 0.2 a, v ds = 1200 v, non repetitive > 20 s reverse gate C source voltage v sg 30 v reverse drain C source voltage v sd 25 v storage temperature t stg -55 to 175 c g tab drain gr s s s s s v ds = 1700 v r ds(on) = 1.5 i d (@ 25c) = 2 a h fe (@ 25c) = 100 please note: the source and gate return pins are not exchangeable. their exchange mi g ht lead to malfunction.
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 2 of 8 section ii: static electrical characteristics a: on state b: off state c: thermal parameter symbol conditions v a l u e unit notes min. typical max. drain C source on resistance r ds ( on ) i d = 1 a, t j = 25 c 1 . 5 gate C source saturation voltage v gs,sat i d = 1 a, i d /i g = 40, t j = 25 c i d = 1 a, i d /i g = 30, t j = 175 c 3.45 3.22 v fig. 4 dc current gain h fe v ds = 5 v, i d = 1 a, t j = 25 c 100 C fig. 2 drain leakage current i dss v ds = 1700 v, v gs = 0 v, t j = 25 c 0.03 a fig. 5 gate leakage current i sg v sg = 20 v, t j = 25 c 20 na thermal resistance, junction - case r thjc 4.83 c/w fig. 7
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 3 of 8 section iii: figures a: static characteristics figure 1: typical output characteristics at 25 c figure 2: dc current gain vs. drain current figure 3: on-resistance vs. temperature figure 4: typical gate C source saturation voltage figure 5: typical blocking characteristics figure 6: input, output, and reverse transfer capacitance
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 4 of 8 figure 7: transient thermal impedance figure 8: forward bias safe operating area at t c = 25 o c figure 9: turn-off safe operating area
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 5 of 8 section iv: driving the GR1500JT17-263 drive topology gate drive power consumption switching frequency application emphasis ttl logic high low wide temperature range constant current medium medium wide temperature range high speed C boost capacitor medium high fast switching high speed C boost inductor low high ultra fast switching proportional lowest high wide drain current range pulsed power medium n/a pulse power static ttl logic driving the GR1500JT17-263 may be driven with direct (5 v) ttl logic an d current amplification. the amplified current level of the sup ply must meet or exceed the steady state gate current (i g,steady ) required to operate the GR1500JT17-263. minimum i g,steady is dependent on the anticipated drain current i d through the sjt and the dc current gain h fe , it may be calculated from the following equation. an accurate value of the h fe may be read from figure 2. an optional resistor r g may be used in series with the gate pin to trim i g,steady , also an optional capacitor c g may be added in parallel with r g to facilitate faster sjt switc hing if desired, further details on these options are given in the following section. , ? , ?1.5 figure 10: ttl gate drive schematic high speed driving the sjt is a current controlled transistor which requires a pos itive gate current for turn-on and to remain in on-state. an id ealized gate current waveform for ultra-fast switching of the sjt while maintaining low gate drive losses is shown in figure 11, it features a posi tive current peak during turn-on, a negative current peak during turn-off, and co ntinuous gate current during on-state. figure 11: an idealized gate current waveform for fast switchin g of an sjt. an sjt is rapidly switched from its blocking state to on-state when the necessary gate charge, q g , for turn-on is supplied by a burst of high gate current, i g,on , until the sjt gate-source capacitance, c gs , and gate-drain capacitance, c gd , are fully charged. = , ? +
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 6 of 8 ideally, i g,on should terminate when the drain voltage falls to its on-state value in order to avoid unnecessary drive losses during the ste ady on- state. in practice, the rise time of the i g,on pulse is affected by the parasitic inductances, l par in the device package and drive circuit. a voltage developed across the parasitic inductance in the source path, l s , can de-bias the gate-source junction, when high drain current s begin to flow through the device. the voltage applied to the gate pin should be maintained high enough, above the v gs,sat (see figure 7) level to counter these effects. a high negative peak current, -i g,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected c arriers from the gate, and achieve rapid tu rn-off. turn off can be achieved with v gs = 0 v, however a negative gate voltage v gs may be used in order to speed up the turn-off transition. a:1: high speed, low loss drive with boost capacitor the GR1500JT17-263 may be driven using a high speed, low loss d rive with boost capacitor topology in which multiple voltage le vels, a gate resistor, and a gate capacitor are used to provide fast sw itching current peaks at turn-on and turn-off and a continuous gate current while in on-state. an example of this topology is shown in figure 12. figure 12: simplified boost capacitor drive topology. a:2: high speed, low loss drive with boost inductor a high speed, low-loss driver with boost inductor is also capab le of driving the GR1500JT17-263 at high-speed. it utilizes a g ate drive inductor instead of a capacitor to provide the high-current gat e current pulses i g,on and i g,off . during operation, inductor l is charged to a specified i g,on current value then made to discharge i l into the sjt gate pin using logic control of s 1 , s 2 , s 3 , and s 4 , as shown in figure 13. after turn on, while the device remains on the necessary steady state gate current i g,steady is supplied from source v cc through r g . please refer to the article a current-sour ce concept for fast and efficient driving of silicon carbide transistors by dr. jacek r?bkowski for additional information on this driving topology. 3 figure 13: simplified inductive pulsed drive topology 3 C archives of electrical engineer ing. volume 62, issue 2, page s 333C343, issn (print) 0004-0746, doi: 10.2478/aee-2013-0026, june 2013 ttl gate signal 5 / 0 v ttl i/p 5 v d s g c g r g i g,steady 20 v i g,on
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 7 of 8 b: proportional gate current driving for applications in which the GR1500JT17-263 will operate over a wide range of drain current conditions, it may be beneficial to drive the device using a proportional gate drive topology to optimize gat e drive power consumption. a proportional gate driver relies on instantaneous drain current i d feedback to vary the steady state gate current i g,steady supplied to the GR1500JT17-263 voltage controlled proportional driver the voltage controlled proportional driver relies on a gate dri ve ic to detect the GR1500JT17-263 drain-source voltage v ds during on-state to sense i d . the gate drive ic will then increase or decrease i g,steady in response to i d . this allows i g,steady , and thus the gate drive power consumption, to be reduced while i d is relatively low or for i g,steady to increase when is i d higher. a high voltage diode connected between the drain and sense protects the ic from high-voltage when the driv er and GR1500JT17-263 are in off-state. a simplified version of this topology is shown in figure 14, additional information will be available in the future at http://www.genesicsemi.com/commercial-sic/sic -junction- transistors/ figure 14: simplified voltage controlled proportional driver current controlled proportional driver the current controlled proportional driver relies on a low-loss transformer in the drain or source path to provide feedback i d of the GR1500JT17-263 during on-state to supply i g,steady into the device gate. i g,steady will then increase or decrease in response to i d at a fixed forced current gain which is set be the turns ratio of the transformer , h force = i d / i g = n 2 / n 1 . GR1500JT17-263 is initially tu rned-on using a gate current pulse supplied into an rc drive circuit to allow i d current to begin flowing. this topology allows i g,steady , and thus the gate drive power consumption, to be reduced while i d is relatively low or for i g,steady to increase when is i d higher. a simplified version of this topology is shown in figure 15, additional information will be available in the future at http://www.genesicsemi.com/commercial-sic/sic-junction-tr ansistors/. figure 15: simplified current controlled proportional driver
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/sic-ju nction-transistors/ pg 8 of 8 section v: package dimensions to-263-7 package outline note 1. controlled dimension is inch. dimension in bracket is millim eter. 2. dimensions do not include e nd flash, mold flash, material pr otrusions revision history date revision comments supersedes 2016/04/04 0 initial release published by genesic semiconductor, inc. 43670 trade center place suite 155 dulles, va 20166 genesic semiconductor, inc. reserves right to make changes to t he product specifications and dat a in this document without not ice. genesic disclaims all and any warranty and liability arising ou t of use or application of any product. no license, express or implied to any intellectual property rights is granted by this document. unless otherwise expressly indicated, genesic products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons syst ems, nor in applications where their failure may result in deat h, personal injury and/or property damage.
GR1500JT17-263 apr 2016 latest version of this datasheet at: http://www.genesi csemi.com/commercial-sic/si c-junction-transistors/ pg 1 of 1 section vi: spice model parameters this is a secure document. please copy this code from the spice model pdf file on our website (http://www.genesicsemi.com/images/products_sic/sjt/gr1500jt17- 263_spice.pdf) into ltspice (version 4) software for simulation of the GR1500JT17-263. * model of genesic semiconductor inc. * * $revision: 1.0 $ * $date: 04-apr-2016 $ * * genesic semiconductor inc. * 43670 trade center place ste. 155 * dulles, va 20166 * * copyright (c) 2016 genesic semiconductor inc. * all rights reserved * * these models are provided "as is, where is, and with no warranty * of any kind either expressed or implied, including but not limited * to any implied warranties of merchantability and fitness for a * particular purpose." * models accurate up to 2 times rated drain current. * .model gr1500jt12 npn + is 9.8338e-48 + ise 1.0733e-26 + eg 3.23 + bf 110 + br 0.55 + ikf 5000 + nf 1 + ne 2 + rb 20 + irb 0.002 + rbm 0.6 + re 0.003 + rc 1.5 + cjc 25e-12 + vjc 3 + mjc 0.5 + cje 80e-12 + vje 3 + mje 0.5 + xti 3 + xtb -1.5 + trc1 6.5e-3 + vceo 1700 + mfg genesic_semiconductor * * end of gr1500jt12 spice model
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